Technology 》NINE KEY PACKAGING AND TESTING TECHNOLOGIES

1、TSV Technology
■ Enable the interconnection between chips and 3D high-density stacking
■ Improve signal transmission speed
■ Reduce internal power consumption
■ Enable maximum performance and smallest size

 

2、SiP RF Technology
■ Widely applied to wireless communications, RF ID, etc.

 

3、Wafer 3D RDL Technology
■ Enable the redistribution of I/O layout.

 

4、Copper Bump Interconnection Technology
■ For high-density or high power packages

5、High-density  FC-BGA Package and Test Technology
■ Reduced cost,reduced package size

 

6、Multi-row Package Technology
■ For packages with I/O numbers ranging from 2 to 500

 

7、Package 3D Stack Technology
■ Save product’s occupied area on PCB ,Reduce the signal interference

 

8、3D Stack Technology for Ultra-thin Chips(thinner than 50μm)  Grinding Technology for Ultra-size Wafer 
■ Sawing Technology for Ultra-thin Wafer 
■ Stack D/B Technology for Ultra-thin Wafer 
■ W/B Technology for Ultra-thin Multi-layer Chips 
■ Ultra-thin Molding technology for Multi-layer Chips

 

9、MEMS MCP Technology
■ MEMS Wafer mounting tech
■ MEMS Wafer cutting tech
■ MEMS Dice mounting tech
■ MEMS Die to die W/B tech
■ MEMS Dice coating tech